2005 System-in-Package Symposium Showcases the Latest Advancements in

2005 System-in-Package Symposium Showcases the Latest Advancements in SiP Technology in the Electronics Capital of the World

    Business Editors/High-Tech Writers
    System-in-Package Symposium

    SAN JOSE, Calif.--(BUSINESS WIRE)--Jan. 5, 2005--

Symposium to Feature Japanese and U.S. Semiconductor Companies at the Forefront of Advanced Electronics Packaging
    Tessera Technologies, Inc. (Nasdaq:TSRA), a leading technology developer, licensor and product development services provider for semiconductor chip-scale and multi-chip packages (CSPs and MCPs), today provided further details of the agenda for its first annual System-in-Package (SiP) Symposium in Tokyo, Japan, to be held on Tuesday, January 18, 2005 at the Le Meridien Grand Pacific Hotel. This highly educational forum will feature leading Japanese and U.S.-based companies who are extending the boundaries of electronics miniaturization and enhanced performance through advanced electronics packaging.
    Dr. David Tuckerman, Tessera's chief technical officer, will open the half-day symposium with a discussion on lowering the risk of SiP implementation. The following industry experts join Tuckerman on the program:

--	Henry Utsunomiya, president of Interconnection Technologies, will discuss market trends, applications and analysis for multiple die packaging.
--	Tessera's Craig Mitchell, vice president of marketing, will explore the benefits and challenges of a new design methodology, SLIM, for system level integration and miniaturization.
--	Gordon Jensen, president of CAD Design Software, will discuss the latest stacked die and 3D automated design tools.
--	Kimitaka Endo, manager of the R&D division at North, will examine high density substrates with copper bumps.
--	Hitachi Cable's Hiroyuki Okabe, technical manager of the 2-metal flexible substrate development group at Hitachi Cable, will discuss flexible substrate solutions for SiPs.
--	Spansion's Junichi Kasai, vice president of final manufacturing R&D, will review issues and solutions facing 3D package assembly.
--	Elpida Memory's Ichiro Anjo, senior manager, production engineering department, will explore the topic of advanced packaging for high-performance DRAM.
--	IBM's Jonathan Hinkle, design engineer, will discuss the usage of stacked packaging solutions for blade server applications.
--	Joseph Fjelstad, co-founder of Silicon Pipe, will examine the topic of emerging trends in advanced IC packaging and interconnection for high speed applications, present and future.
--	Kenji Tsuda, editor of Semiconductor International Japan, will provide closing comments.

    Tessera and Semiconductor International Japan have teamed to sponsor the Symposium, which will take place on Tuesday, January 18, the day before the opening of the IC Packaging Technology Expo (ICP) in Japan. The half-day symposium will run from 1:00-5:30 p.m., followed by a reception from 5:30-7:00 p.m. Pre-registration is requested and encouraged for those who would like to secure attendance to the event. Attendees can register at www.tessera.com. For additional information, contact Daryl Larsen, symposium event manager, at 408-952-4364 or dlarsen@tessera.com.

    About Tessera, Inc.

    Tessera develops semiconductor packaging technology that meets the demand for miniaturization and increased performance of electronic products. Tessera licenses its technology to its customers, enabling them to produce semiconductors that are smaller and faster, and incorporate more features. These semiconductors are utilized in a broad range of communications, computing and consumer electronic products.

    Safe Harbor Statement

    This press release contains forward-looking statements, which are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Forward-looking statements involve risks and uncertainties that could cause actual results to differ significantly from those projected. Factors that might cause or contribute to such differences include, but are not limited to, fluctuations in Tessera's operating results due to the timing of new license agreements and royalties, Tessera's ability to protect its intellectual property and the risk of a decline in demand for semiconductor products. You are cautioned not to place undue reliance on the forward-looking statements, which speak only as of the date of this release. Tessera's filings with the Securities and Exchange Commission, including its Annual Report on Form 10-K for the year ended December 31, 2003, include more information about factors that could affect the company's financial results.

    Note: Tessera and the Tessera logo are registered trademarks of Tessera, Inc. All other company, brand and product names may be trademarks or registered trademarks of their respective companies.

--30--JR/sf*

CONTACT: Tessera Joyce Smaragdis, 510-338-0377 Public Relations jsmaragdis@tessera.com or Porter Novelli, for Tessera Ricky Gradwohl, 408-369-1500 ext. 631 ricky.gradwohl@porternovelli.com

KEYWORD: CALIFORNIA JAPAN INTERNATIONAL ASIA PACIFIC INDUSTRY KEYWORD: HARDWARE COMPUTERS/ELECTRONICS TELECOMMUNICATIONS TRADESHOW PRODUCT SOURCE: Tessera Technologies, Inc.

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