Synplicity Announces Major Enhancements to Industry-Leading FPGA Synth

Synplicity Announces Major Enhancements to Industry-Leading FPGA Synthesis Software

    Business Editors/High-Tech Writers

    SUNNYVALE, Calif.--(BUSINESS WIRE)--Jan. 24, 2005--

New Synplify Pro FPGA Synthesis Software Dramatically Increases Productivity and Further Improves Quality of Results
    Synplicity Inc. (Nasdaq:SYNP), a leading supplier of software for the design and verification of semiconductors, today unveiled major enhancements to its industry-leading FPGA synthesis software. These enhancements are designed to provide users with significant productivity gains through close integration with formal verification, place & route, and debugging products while also improving upon the company's unmatched quality of results (QoR) for FPGAs in terms of area and timing performance.
    The Synplify Pro(R) 8.0 synthesis tool delivers these productivity and QoR improvements through new features and greater integration with other tools in the design flow. For example, integrated formal verification flow support for Cadence's Conformal and Prover Technology's eCheck equivalence checker software is now provided, enabling the Synplify Pro software's advanced optimizations to be used with popular formal verification software solutions. In addition, the Synplify Pro software now delivers tighter integration with place and route tools from Actel, Altera and Xilinx, making it easier for users to run place and route after synthesis and manage the results in the Synplify Pro project. For easy debugging, Synplicity's Identify(R) tool, the only source code debugging product for FPGAs, has also been integrated into the Synplify Pro product. This latest version of the Synplify Pro software also includes new device support for Actel's newly announced low-cost ProASIC3 FPGAs as well as Altera's HardCopy II family of structured ASICs.
    "Synplicity has set the standard in FPGA synthesis for many years and with today's introduction of our newest Synplify Pro software we have taken big steps in improving the productivity of our users, which directly impacts their ability to get their designs to market quickly," said Jeff Garrison, director of marketing for FPGA products at Synplicity. "In addition to the many time saving features, we're seeing significant improvements in timing performance and area reduction, which often enables designers to move to a less expensive device."

    New Synplify Pro Software Enhancements

    The Synplify Pro 8.0 software writes out a verification interface file (VIF) for use with formal verification flows targeting Altera and Xilinx devices. Popular formal verification tools, such as Prover Technology's eCheck, can now read the optimizations performed by the Synplify Pro synthesis software and perform logical equivalency checking (See press release announced today titled, "Synplicity and Prover Technology Introduce Best-in-Class FPGA Synthesis and Logic Verification Flow for Industry-Leading FPGA Devices"). The integrated verification flow automates equivalence checking of FPGA designs, significantly reducing the need for manual configuration and providing FPGA designers with an equivalence checking methodology that was previously only available to ASIC designers.
    Cadence's Conformal LEC product extends equivalency checking to FPGAs through the Synplicity design flow for Altera and Xilinx devices (as originally announced by Cadence in November, 2004). The Conformal technology checks the functional equivalence of designs at various critical stages, enabling the designer to quickly identify and correct potential errors.
    For designers that want to use the System Verilog language to describe their FPGA designs, the new Synplify Pro software supports a subset of the System Verilog specification in order to further improve designer productivity through higher level coding efficiency. Support for System Verilog within the Synplify Pro software includes:

--	Simplified named port connections using .name
--	Implicit port connections using .*
--	Procedural statement support for 'always'

    In addition, the log file generated during synthesis by the Synplify Pro software is now HTML based, allowing specific sections to be easily navigated and viewed. Users also have the ability to filter out certain errors and warnings, enabling them to focus only on new errors and warnings that occur with the latest synthesis run, thereby improving productivity.
    The Synplify Pro software incorporates a powerful new command line TCL Find feature that allows designers to use expressions and operators to find and collect specific elements in their design and then perform operations such as add, union and difference. With this feature, users can quickly analyze their FPGA design and create very specific design constraints for improved performance. A true dual-write RAM support feature is also provided to enable the Synplify Pro software to select the correct RAM implementation for the user's target FPGA device.

    Debugging Technology Incorporated Within the Synplify Pro Software

    As FPGA complexity increases, the amount of time spent in debug has increased commensurately. As a result, Synplicity's powerful Identify RTL debugger has been integrated into the Synplify Pro product allowing users to quickly bring up the Instrumentor and Debugger tools from within the Synplify Pro software user interface and have the debug files managed through a common project.

    Support for New Device Families

    In addition to the new major enhancements, the Synplify Pro(R) 8.0 synthesis tool also features timing-driven synthesis support for Actel's new ProASIC3/E FPGAs, as well as Altera's new HardCopy II family of structured ASICs, both introduced today by the respective companies (See press releases announced today titled, "Synplicity Announces Support for Actel's Low-Cost ProASIC3 and ProASIC3E FPGAs" and "Synplicity's Market-Leading FGPA Synthesis Solutions Support Altera's HardCopy II Devices").

    What our Partners are Saying

    "Synplicity has worked closely with Actel over the past year to provide superior synthesis support for our new ProASIC3/E family of FPGAs," commented Saloni Howard-Sarin, director of antifuse and tools marketing at Actel. "Features in the Synplify Pro 8.0 software, such as support for Advanced Global Options and Forward Annotated SDC, will allow customers to achieve their performance and utilization goals while benefiting from the cost advantages of our new device family."
    Jim Smith, director of EDA vendor relations at Altera, stated, "The new HTML Log Viewer and TCL Find features in the Synplify Pro 8.0 software give users the power and flexibility to quickly analyze and constrain their designs for optimal performance. This enables customers targeting high-performance Stratix II FPGAs and HardCopy II structured ASICs to realize the performance requirements of their design while achieving time-to-market advantages."
    Steve Lass, director, software marketing at Xilinx, added, "With its new version of the Synplify Pro software, Synplicity has further improved performance for our industry-leading Virtex-4 family, offering the best synthesis technology available for these devices."

    Pricing and Availability

    The Synplify 8.0 software is available now. Pricing for the Synplify software starts at $9,500 (U.S.). For more information visit Synplicity's Web site at http://www.synplicity.com.

    About Synplicity

    Synplicity(R) Inc. (Nasdaq:SYNP) is a leading supplier of innovative synthesis, verification and physical implementation software solutions that enable the rapid and effective design and verification of semiconductors. Synplicity's high-quality, high-performance tools significantly reduce costs and time-to-market for FPGA, Structured/Platform ASIC and cell-based/COT ASIC designers. The company's underlying Behavior Extracting Synthesis Technology(R) (BEST(TM)), which is embedded in its logical, physical and verification tools, and has led to Synplicity's top position in FPGA synthesis, now provides the same fast runtimes and quality of results to ASIC and COT customers. The company's fast, easy-to-use products support industry standard design languages (VHDL and Verilog) and run on popular platforms. Synplicity employs over 280 people in its 20 facilities worldwide. Synplicity is headquartered in Sunnyvale, California. For more information visit http://www.synplicity.com.

    Forward-Looking Statements

    This press release contains forward-looking statements including, but not limited to, statements regarding Synplicity's performance in the FPGA market and the performance, achievements and benefits of the latest versions of the Synplify Pro, Amplify and Identify software, both individually and used in conjunction with third-party products. In some cases, you will be able to identify forward-looking statements by terminology such as "may," "will," "should," "expects," "believes" or the negative of these terms or other comparable terminology. These statements are only predictions and involve known and unknown risks, uncertainties and other factors that may cause the actual results to differ materially from the forward-looking statements, including the performance and benefits of Synplicity's software relative to relevant industry methods or standards, design flaws, design difficulties or other problems with Synplicity's software, and the growth and changing technical requirements in the FPGA market. For additional information and considerations regarding the risks faced by Synplicity, see its annual report on Form 10-K for the year ended December 31, 2003 as filed with the Securities and Exchange Commission, as well as other periodic reports filed with the SEC from time to time, including its quarterly reports on Form 10-Q. Although Synplicity believes that the expectations reflected in the forward-looking statements are reasonable, Synplicity cannot guarantee the future performance or achievements of its software. In addition, neither Synplicity nor any other person assumes responsibility for the accuracy or completeness of these forward-looking statements. Synplicity disclaims any obligation to update information contained in any forward-looking statement.

    Synplicity, Behavior Extracting Synthesis Technology, Identify, Synplify, Synplify Pro and Amplify are registered trademarks of Synplicity Inc. BEST and Physical Optimizer are trademarks of Synplicity Inc. All other brands or products are the trademarks or registered trademarks of their respective owners.

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CONTACT: Synplicity Inc. Jeff Garrison, 408-215-6000 (Reader) jeff@synplicity.com or Porter Novelli Steve Gabriel, 408-369-1500 (PR) steve.gabriel@porternovelli.com

KEYWORD: CALIFORNIA INDUSTRY KEYWORD: HARDWARE SOFTWARE MANUFACTURING PRODUCT EDA SOURCE: Synplicity Inc.

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