Freescale Advances PowerQUICC Architecture With High-Performance, Pack

Freescale Advances PowerQUICC Architecture With High-Performance, Packet-Friendly Communications Engine

    Business Editors/Technology Editors
    Embedded Systems Conference San Francisco 2005

    SAN FRANCISCO--(BUSINESS WIRE)--March 7, 2005--

    MPC8360E PowerQUICC(TM) II Pro Processor Family Targets Converged Packet Network Market With Next-Generation QUICC Engine(TM) Technology Designed for Multi-Protocol Interworking and Layer 3 Packet Processing

    The evolution to packet-based networks is reshaping wireline and wireless access. It requires communications equipment makers to deliver Internet Protocol (IP) convergence solutions that are cost-effective and compatible with existing software. Freescale Semiconductor (NYSE:FSL) (NYSE:FSL.B) is addressing this convergence/compatibility/cost challenge with next-generation PowerQUICC(TM) processors based on a PowerPC(R) core and a new, packet-friendly communications engine.
    Freescale's MPC8360E PowerQUICC(TM) II Pro processor family with QUICC Engine(TM) technology provides an advanced yet backward-compatible communications processing solution designed to drive down the cost of developing packet-based networking and wireless equipment. Based on the e300 PowerPC system-on-chip (SoC) platform, the family consists of the MPC8360E and the MPC8358E processors, both of which contain Freescale's innovative QUICC Engine technology. (E designates on-chip encryption; versions without integrated security engines are also available.)

    Significant Technology Development

    "Freescale's QUICC Engine technology is the most significant development in the PowerQUICC family since the creation of the PowerQUICC architecture a decade ago," said Linley Gwennap, principal analyst of The Linley Group. "QUICC Engine technology turbocharges PowerQUICC processor performance on data-plane tasks such as interworking, switching and parsing. Even with this more powerful engine, Freescale is offering the new enhanced processors at a very competitive price."
    "Bringing QUICC Engine technology to the PowerQUICC II architecture makes perfect sense for cost-sensitive, mainstream packetized applications," said David Perkins, senior vice president and general manager of Freescale's Networking and Computing Systems Group. "Since QUICC Engine technology is scalable, we can easily extend it into more powerful Freescale processors to serve more demanding packet-based applications."
    The MPC8360E family with QUICC Engine technology is designed to provide optimal price/performance and a balance of powerful control plane and data-path capabilities for the cost-sensitive "sweet spot" of the IP convergence market. Target applications include IP DSLAMs, voice over IP (VoIP) systems, 3G wireless infrastructure, passive optical networking (PON) equipment, multi-service access platforms and enterprise routers.
    "The high level of integration, software compatibility with our installed base of PowerQUICC processors, and new features offered by the QUICC Engine, such as interworking, make the MPC8360E a compelling solution for next-generation, triple-play-capable IP DSLAM applications," said Franc Dolenc, director of research and development at Iskratel, a leading provider of broadband access solutions.
    "We are pleased to endorse Freescale's MPC8360E processor with QUICC Engine technology for our next-generation small/medium enterprise routers," said Marc Vanlaer, technology manager for Telindus. "The MPC8360E offers the ideal combination of integration, software compatibility, price/performance and security features we need for SME applications."

    QUICC Engine Technology

    QUICC Engine technology is an evolutionary leap forward for Freescale's RISC-based communications processor module (CPM) -- a key element of PowerQUICC architecture. Freescale's new communications engine delivers the packet throughput, interworking capabilities (without CPU intervention), multi-protocol support, high channel density and software compatibility that equipment manufacturers need to develop advanced yet economical solutions for converged packet networks.
    Based on Freescale's SoC methodology and designed for scalability, the MPC8360E family's QUICC Engine technology features two RISC processors, each running at up to 500MHz. This architecture enables QUICC Engine technology to deliver a combined full-duplex data throughput of up to 1.2Gbps including interworking. Eight Unified Communication Controllers (UCCs) provide support for Gigabit Ethernet, HDLC, and UTOPIA / Packet over SONET (POS) at up to OC-12 speeds.
    QUICC Engine technology offers exceptional channel density for cost-sensitive, packet-based applications. For high-density VoIP systems such as media gateways and IP PBXs, QUICC Engine technology supports more than 2,000 voice channels, about three times as many as Freescale's CPM. It also enables development of IP DSLAMs that support up to 256 subscribers, achieving high density levels to help reduce system cost.

    CodeWarrior(TM) QUICC Engine Utility

    The CodeWarrior(TM) QUICC Engine utility, a graphical user interface (GUI) tool from Freescale, is available to accelerate and simplify initialization and configuration of drivers and communications protocols managed by QUICC Engine technology. The tool provides an easy-to-use, menu-driven environment that enables developers to handle common QUICC Engine initialization tasks. Key features include protocol conflict notification, as well as immediate access to documentation via "mouse-over" functionality and drop-down menus.
    Along with QUICC Engine technology, the MPC8360E family's features and enhancements make it ideal for today's and tomorrow's wired and wireless access equipment and enterprise networking equipment. It offers:

--	A high-performance e300 PowerPC core scaling up to 667 MHz
--	Flexible asynchronous design, enabling the e300 core and QUICC Engine technology to operate at different clock speeds
--	High-speed memory access through a dual double data rate (DDR) memory controller (1x64-bit or 2x32-bit, up to 333MHz) and a 133MHz local system bus
--	Exceptional connectivity with support for a wide range of communications interfaces, such as MII, RMII, GMII, TBI, dual UART, dual I2C, dual SPI, USB (full/low-speed) and PCI
--	An integrated security engine supporting DES, 3DES, MD-5, SHA-1, AES and ARC-4 encryption algorithms, a public key accelerator and an on-chip random number generator.

    The MPC8360E family is software-compatible with previous PowerQUICC communications processor generations. The family is supported by CodeWarrior development tools from Freescale and by a comprehensive ecosystem of development tools, operating systems and applications from third-party vendors working through Freescale's Smart Networks Alliance Program. This backward-compatibility and extensive ecosystem support helps to preserve software investments, minimize development overhead and speed time-to-market.

    Pricing and Availability

    Initial samples of the MPC8360E and MPC8358E processors with QUICC Engine technology are planned for Q3 2005. For preliminary pricing information, please contact your local Freescale sales representative.

    About Freescale Semiconductor

    Freescale Semiconductor, Inc. (NYSE:FSL) (NYSE:FSL.B) is a global leader in the design and manufacture of embedded semiconductors for the automotive, consumer, industrial, networking and wireless markets. Freescale became a publicly traded company in July 2004 after more than 50 years as part of Motorola, Inc. The company is based in Austin, Texas, and has design, research and development, manufacturing or sales operations in more than 30 countries. Freescale, a member of the S&P 500(R), is one of the world's largest semiconductor companies, with 2004 sales of $5.7 billion (US). www.freescale.com

    Freescale(TM) and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. The "PowerPC" name is a trademark of IBM Corp. and used under license. (C) Freescale Semiconductor, Inc. 2005.

    NOTE TO EDITORS: In the term "dual I2C" above, the "2" is superscript. It was changed for transmission purposes only.

--30--BD/sa*

CONTACT: Freescale Semiconductor, Inc., Austin North America: Dale Weisman, 512-996-5142 (Office) or 512-560-6197 (Mobile) dale.weisman@freescale.com or Representing Freescale Semiconductor Kathy Truesdell, 512-996-5117 (Office) or 512-633-8620 (Mobile) truesdel@onr.com or Europe, Middle East, Africa: Regina Cirmonova, +41-22-799-1258 regina.cirmonova@freescale.com or Asia Pacific: Gloria Shiu, +852-2666-8237 gloria.shiu@freescale.com or Japan: Shinichi Sunohara, +81-3-5437-9129 shinichi.sunohara@freescale.com or Latin America: Ruth Ruiz, 480-814-4897 ruth.ruiz@freescale.com

KEYWORD: CALIFORNIA TEXAS TRACK INDUSTRY KEYWORD: TELECOMMUNICATIONS SOFTWARE NETWORKING HARDWARE AUTOMOTIVE TRADESHOW PRODUCT SOURCE: Freescale Semiconductor, Inc.

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